Microchip has recently released the SAMA7D65 MPU, a high-performance Arm Cortex-A7 embedded processor designed for HMI and ...

Over the past 25 years we have seen the transition from SDRAM (Synchronous Dynamic RAM) to DDR (Double Data Rate) SDRAM, and then to DDR2, DDR3 and DDR4 on a cadence of five year cycles. Currently we ...

The combination of Eureka DDR controller and Dolphin physical interface (DDR PHY) transceiver provide chip designers a fully integrated and validated solution for high speed DDR2 and DDR3 memory ...

Teledyne DALSA has recently announced the Tetra line scan camera family with 2.5GbE networking, up to 8K resolution, a line rate of up to 150 kHz, and offered in monochrome or color versions.